This invention relates to a substrate structure of a semiconductor device especially an integrated circuit semiconductor device in which a plurality of semiconductor elements are incorporated into a single semiconductor substrate, and a method of manufacturing the substrate structure.
As a method of insulating and isolating elements of an integrated circuit, a method of selective oxidation has been used which selectively thermally oxidizes the peripheries of the elements. Various methods have also been proposed in which grooves are formed about the elements and the grooves are filled with dielectric. With the selective oxidation method, for example, in the case of a bipolar LSI process, it is necessary to completely isolate epitaxially grown parts with oxide films. But this process requires thermal oxidation over a long time so that redistribution of impurities degrades the performance of the elements. Furthermore, at the time of selective oxidation, bird's beak and bird's head are formed which prevents formation of integrated circuits of high density.
On the other hand, according to a prior art method in which a groove is formed for the purpose of insulating and isolating elements, and the groove is then filled with dielectric, only a narrow isolating region having a constant width can be formed. For this reason it has not been proposed to make a substrate of a semiconductor device in which a thick field oxidized region for wiring is in direct contact with the isolating groove.
When one attempts to form a thick field oxide region adjacent to the prior art isolating groove, it is necessary to use an additional photolithographic process which complicates the process steps. Considering a margin for mask alignment, as it is impossible to form a field oxide film free from any bird's beak and bird's head, in direct contact with the groove, the surfaces of the groove and the field oxide region would be at different levels. The failing to obtain a substrate having a flat surface. Moreover some bird's beak and bird's head remain making it difficult to fabricate an integrated circuit at a high density. Further, according to the prior art groove isolation, since the pattern of the groove is formed by the conventional light exposure technique it is impossible to realize a groove width of a dimension smaller than the limit of the light exposure technique. This also decreases the density of integration. Where the width of the isolating groove is increased, the groove is not completely filled with dielectric with the result that it has been impossible to obtain a substrate having a flat surface.